The present invention generally relates to semiconductor devices and semiconductor processing. More particularly, the present invention relates to a device structure and method of manufacture which uses an SOI MOS type architecture to generate a high performance lateral bipolar transistor, wherein the transistor exhibits a controllable, high gain without a corresponding degradation in base resistance.
Integrated circuits utilize a variety of circuit components to effectuate desired functions, for example, transistors, resistors, capacitors, etc. Transistors can be broadly characterized in two categories: bipolar transistors and MOSFET (field effect) transistors. Bipolar transistors and MOSFET (MOS) transistor devices operate under different physical principles, however, both are used as either amplifying or switching devices. In the first application, the transistor""s function is to accurately amplify small ac signals; in the second, the transistor operates as a switch, turning from an ON state to an OFF state and back. The above transistor functions exist because of xe2x80x9ctransistor action,xe2x80x9d which will be briefly discussed below.
A simplified cross section diagram and corresponding schematic representation of an npn-type bipolar transistor is illustrated in prior art FIGS. 1a and 1b, designated by reference numeral 10. The transistor 10 of prior art FIG. 1a is an npn-type bipolar transistor and is composed of doped semiconductor material regions, wherein n-type regions have electrons as their majority carriers while p-type regions employ holes as their majority carriers. The transistor 10 has a collector region 12, a base region 14, and an emitter region 16, respectively.
The npn bipolar transistor of FIG. 1a generally works in the following manner. When a forward biased voltage is applied to the base-emitter junction, a large number of electrons are injected into the base 14 from the emitter 16. If the distance between the emitter 16 and the collector 12 is sufficiently small (i.e., the base 14 is thin), the electrons will reach the collector 12 prior to recombination. Even if the junction between the base 14 and the collector 12 is reverse biased, the electric field at that location will sweep the electrons across the junction and the electrons will be xe2x80x9ccollectedxe2x80x9d by the collector 12. This phenomena gives rise to a collector current (IC) which is almost as large as the forward-biased current at the base-emitter junction (IE) Therefore, a large current will flow in a reverse-biased junction (i.e., the base-collector junction) due to the existence of a nearby forward-biased junction (i.e., the base-emitter junction) if the size of the base 14 is dimensioned appropriately. This phenomena is called bipolar transistor action.
Not all of the electrons injected into the base 14 will arrive at the collector 12. Some of the electrons will recombine in the base region 14 as they travel therethrough. Clearly, as the size of the base region 14 varies, the amount of recombination will also vary, thus impacting the xe2x80x9ccollection efficiencyxe2x80x9d of the transistor. The recombination phenomena, along with the injection of holes from the emitter 16 into the base 14, forms the base current. The base region 14 (both its dopant concentration and its size) thus plays an important role in the performance of the bipolar transistor 10, as evidenced by the common-emitter current gain xcex2, given by:
xcex2=ICIB.
Note that as IB decreases, the transistor gain increases, which is advantageous for both analog type circuit applications (for amplification) and digital circuit applications (for switching speed). Therefore it is desirable (for the sake of improved transistor gain) to make the base region 14 as thin as possible.
FIG. 2 is a fragmentary cross section diagram illustrating a prior art vertical pnp-type bipolar transistor 20. The transistor 20 has a p-type collector region 22, such as a p-well or the substrate, in which an n-type base region 24 is formed. A p-type emitter region 26 is then formed in the base region 24, typically via deposition or ion implantation. In such a vertical structure (which is the conventional configuration for many bipolar transistor integrated circuits), the base thickness (dB) is limited disadvantageously by the ability to control the depths of the base region 24 and the emitter region 26, respectively. Consequently, obtaining a controllable, high transistor gain is difficult.
Another characteristic which impacts the performance of bipolar transistors is the effective base resistance. Schematically, the base resistance is illustrated in prior art FIGS. 3a and 3b, respectively. The base resistance (RB) results in a switching delay of the transistor as a function of the RC time constant (wherein RC corresponds to RBCB as illustrated). Referring, for example, to prior art FIG. 2, the base resistance RB consists of the resistivity of the n-type base region 24 (which is a function of its doping concentration) and the area associated with the minimum space (dB) between the collector region 22 and the emitter region 26, respectively.
From the above discussion, its becomes clear that as the spacing dB decreases (which is advantageous for transistor gain), the base resistivity increases (which is disadvantageous for base resistance). Consequently, traditional bipolar transistor structures often demand a design performance trade-off between transistor gain and base resistance. Therefore there is a need in the art for a bipolar transistor device and a method of manufacture which overcomes the problems associated with the prior art.
The present invention relates to a lateral bipolar transistor structure and a method of manufacture which provides a high, controllable gain characteristic without a substantial base resistance performance trade-off as is typical in conventional bipolar transistor structures.
The transistor structure of the present invention is preferably formed in a semiconductor material which overlies an insulating layer and thus constitutes a silicon-on-insulator (SOI) device. The lateral bipolar transistor is similar in some respects to a conventional MOS transistor device, however, several significant differences exist. A conductive base contact material (similar to a MOS gate electrode) is formed over an insulating layer (similar to a gate oxide) which overlies the semiconductor material. The conductive base contact material is electrically connected to a portion of the semiconductor material (which forms a base region of the transistor device) through a contact hole in the insulating layer. The collector region and the emitter region are then formed in the semiconductor layer and are self-aligned with respect to the base contact (similar to the way in which drain and source regions are self-aligned with respect to the gate).
The lateral bipolar transistor of the present invention provides for a high transistor gain by forming a very thin base region in a controllable manner. By using the base contact which can be controlled relatively tightly to self-align the collector and emitter regions, the base thickness can be tightly controlled by the base contact width. By varying the thickness of the conductive feature which constitutes the base contact, a designer can form the transistor with an easily tunable, large transistor gain with the extremely thin base region in a controlled, repeatable manner. Because the lateral bipolar transistor is analogous in some respects to a traditional MOS-type device, the base thickness is analogous to the channel length in a MOS transistor.
In addition, the lateral bipolar transistor of the present invention provides a large transistor gain without negatively increasing the transistor base resistance. Because the base contact electrically contacts the base region through an insulating layer which is analogous to a MOS-type gate oxide, the transistor can extend in the transistor xe2x80x9cwidthxe2x80x9d direction a sufficient length so as to reduce the transistor base resistance to an acceptable level. That is, the lateral bipolar transistor can be extended in a second dimension which is generally perpendicular to the base thickness dimension to increase the area of the base region between the collector and emitter regions, respectively.
The present invention is also directed to a method of manufacture of a lateral bipolar transistor device. The method includes the step of forming an insulating layer over an SOI material and forming a base contact hole in the insulating layer. A base contact is then formed in a region overlying the base contact hole of the insulating layer. Collector and emitter regions are then formed in the SOI material, using the base contact to self-align the collector and emitter regions, respectively, and defining a base region therebetween. The thickness of the base contact thus substantially defines the thickness of the base region which dictates, at least in one respect, the gain of the lateral bipolar transistor. The method further includes forming the base contact along an entire width of the transistor device, thereby increasing the area between the collector and emitter without adversely impacting the base region thickness.
To the accomplishment of the foregoing and related ends, the invention comprises the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative embodiments of the invention. These embodiments are indicative, however, of but a few of the various ways in which the principles of the invention may be employed. Other objects, advantages and novel features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the drawings.